Name : Musca_B1
description : ARM 32-bit v8-M Mainline based device
Architecture : (CM33)
revision : r0p2
endian : little
Memory Protection Unit (MPU) : available
Number of relevant bits in Interrupt priority : 4
name : CODE_SRAM_MPC
description : Code SRAM Memory Protection Controller
base address : 0x0
name : DUALTIMER
description : Dual Timer
base address : 0x0
Interrupt (5) DUALTIMER : Dual Timer
name : DUALTIMER_Secure
description : Dual Timer (Secure)
base address : 0x0
name : EFLASH0_MPC
description : EFlash0 Memory Protection Controller
base address : 0x0
name : EFLASH1_MPC
description : EFlash1 Memory Protection Controller
base address : 0x0
name : GPIO0
description : General-purpose I/O 0
base address : 0x0
Interrupt (68) GPIO0 : GPIO 0 combined
name : GPIO0_Secure
description : General-purpose I/O 0 (Secure)
base address : 0x0
name : GPTIMER
description : General-Purpose Timer
base address : 0x0
Interrupt (72) GPTIMERINT1 : General-Purpose Timer (Comparator 1)
name : GPTIMER_Secure
description : General-Purpose Timer (Secure)
base address : 0x0
name : iCache
description : Cache
base address : 0x0
name : NSPCTRL
description : Non-secure Privilege Control Block
base address : 0x0
name : PWM
description : PWM_IP6512
base address : 0x0
Interrupt (75) PWMINT2 : PWM2 interrupt
name : QSPIFCTRL
description : QSPI Flash Controller
base address : 0x0
Interrupt (38) QSPIINTR : QSPI interrupt
name : QSPIFCTRL_Secure
description : QSPI Flash Controller (Secure)
base address : 0x0
name : QSPI_MPC
description : QSPI Flash Memory Protection Controller
base address : 0x0
name : S32KTIMER
description : S32K Timer
base address : 0x0
Interrupt (2) S32KTIMER : Timer 1
name : S32KTIMER_Secure
description : S32K Timer (Secure)
base address : 0x0
name : S32KWATCHDOG
description : S32K Watchdog (Secure)
base address : 0x0
name : SAU
description : Security Attribution Unit
base address : 0x0
name : SCC
description : Serial Communication Controller
base address : 0x0
name : SPCTRL
description : Secure Privilege Control Block
base address : 0x0
name : SPI0
description : SPI 0
base address : 0x0
Interrupt (37) SPIINTR0 : SPI0 interrupt
name : SPI0_Secure
description : SPI0 (Secure)
base address : 0x0
name : SRAM0MPC
description : Memory Protection Controller 0
base address : 0x0
Interrupt (9) MPC : MPC Combined
name : SRAM1MPC
description : SRAM 1 Memory Protection Controller
base address : 0x0
name : SRAM2MPC
description : SRAM 2 Memory Protection Controller
base address : 0x0
name : SRAM3MPC
description : SRAM 3 Memory Protection Controller
base address : 0x0
name : SYSINFO
description : System Information
base address : 0x0
name : SYSINFO_Secure
description : System Information (Secure)
base address : 0x0
name : SystemControl
description : System Control
base address : 0x0
name : TIMER0
description : Timer 0
base address : 0x0
Interrupt (3) TIMER0 : Timer 0
name : TIMER0_Secure
description : Timer 0 (Secure)
base address : 0x0
name : TIMER1
description : Timer 1
base address : 0x0
Interrupt (4) TIMER1 : Timer 1
name : TIMER1_Secure
description : Timer 1 (Secure)
base address : 0x0
name : UART0
description : UART 0
base address : 0x0
Interrupt (44) UARTINTR0 : UART0 interrupt
name : UART0_Secure
description : UART 0 (Secure)
base address : 0x0
name : UART1
description : UART 1
base address : 0x0
Interrupt (50) UARTINTR1 : UART1 interrupt
name : UART1_Secure
description : UART 1 (Secure)
base address : 0x0
name : WATCHDOG
description : Non-secure Watchdog Timer
base address : 0x0
Interrupt (1) NONSEC_WATCHDOG_IRQ : Non-Secure Watchdog Interrupt
name : WATCHDOG_Secure
description : Watchdog (Secure)
base address : 0x0
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